This in depth study addresses questions, such as “Is their enough physical space to install the fibers I need?” “Can I install the topology needed and still provide room for future expansion and ensure adequate fiber protection?”
This paper will explain some of the fundamentals of System Level Thermo-Fluid Analysis and demonstrate why 1D CFD is not an accurate description. It will shed some light on both the philosophy that underpins the system approach and how and why it is used.
Nearly all the transportation and distribution companies in a market are governed by the similar labor laws, pay the same fuel prices and share the same roads. So why are some much more successful than others? Winning T&L companies don’t rely on cyclical business conditions to be successful. They can be profitable in any business conditions because they are differentiated, either in the services they offer customers or in their underlying business processes.
This white paper discusses the conditions that have created the need for pattern matching techniques, the identification and creation of patterns, the Calibre Pattern Matching process, and the benefits derived from its use.
What Is CFA and Why Do I Need It? This five-part paper series examines the conditions that led to the development of recommended rules, and describes the process by which automated design analysis and rule verification can help designers optimize designs to the fullest and most efficient use of area, while still ensuring manufacturability.
The Mechanical Analysis Division of Mentor Graphics (formerly Flomerics) provides the world's most advanced computational fluid dynamics products. Our simulation software and consultancy services eliminate mistakes, reduce costs, and accelerate and optimize designs involving heat transfer and fluid flow before physical prototypes are built.
The focus of this paper is a combined electrical, thermal and optical characterization of power LED assemblies. Thermal management play important role in case of power LEDs, necessitating both physical measurements and simulation.
Many of the mysteries of equipment failure, downtime, software and data corruption, are the result of a problematic supply of power. There is also a common problem with describing power problems in a standard way. This white paper will describe the most common types of power disturbances, what can cause them, what they can do to your critical equipment, and how to safeguard your equipment, using the IEEE standards for describing power quality problems.
This white paper describes the use of CFD for LED lighting products. Thermal management is critical to LED performance and life so mechanical designers need to consider thermal issues from the earliest stages of the development process
"As the number of enhancements to various Hardware Description Languages (HDLs) has increased over the past year, so too has the complexity of determining which language is best for a particular design. Many designers and organizations are contemplating whether they should switch from one HDL to another.
This paper compares the technical characteristics of three, general-purpose HDLs.
Despite progress in virtualization, much development still remains. With predictions that virtualization will become pervasive, this research highlights forthcoming challenges and strategic issues facing IT planners. Register now for this free Gartner report sponsored by Dell and Intel to receive important advice on how to deal issues such as heterogeneity, resources and performance optimization, and the increasing fragmented tool market.
A powerful signal integrity analysis tool must be flexibility, easy to use and integrated into an existing EDA framework and design flow. In addition, it is important for the tool to be accurate enough. This report reviews a validation study for the Mentor Graphics HyperLynx 8.0 PI tool to establish confidence in using it for power integrity analysis.
For advanced signaling over high-loss channels, designs today are using equalization and several new measurement methods to evaluate the performance of the link. Both simulation and measurement tools support equalization and the new measurement methods, but correlation of results throughout the design flow is unclear. In this paper a high performance equalizing serial data link is measured and the performance is compared to that predicted by simulation. Then, the differences between simulation and measurements are discussed as well as methods to correlate the two.
High Density Interconnect (HDI) is being used more often to meet the growing need for more complex designs in smaller form factors. Beyond some of the more obvious electrical effects of using smaller vias, there is also an impact to the power integrity of a board using HDI. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses. This paper will examine and quantify these effects, using numerous design examples, including a large conventional through-hole design board that was reduced using HDI.
The success of any consumer electronic device depends to a large extent on the appeal of the user interface (UI) and how easy the device is to use. Studies show that good cosmetic design can encourage users to explore the full range of features and often engenders the perception that a product is easier to use. So if the benefits of a great looking, easy-to-use UI are so clear, why are so many products still falling short of customer expectations? The solution lies in taking a fresh new approach a consumer electronic device UI plays. By identifying common UI functionality and implementing it in a reusable and customizable way, we can make it far easier for embedded engineers to deliver visually engaging and easy-to-use consumer electronic products.
Moving to C++ presents opportunities for higher programmer productivity. The requirements of embedded systems, however, demand that the adoption of C++ be carefully measured for the performance impact of run-time costs present in C++, but not in C. This talk suggests strategies for developers who are starting their acquaintance with C++.
To accommodate increasingly dense technology environments, increasingly critical business applications, and increasingly stringent service level demands, data centers are typically engineered to deliver the highest-affordable availability levels facility-wide. Within this monolithic design approach, the same levels of mechanical, electrical, and IT infrastructure are installed to support systems and applications regardless of their criticality or business risk if unplanned downtime occurs. Typically, high redundancy designs are deployed in order to provide for all eventualities. The result, in many instances, is to unnecessarily drive up both upfront construction or retro-fitting costs and ongoing operating expenses.
While production is often optimized and automated, producing the necessary documentation often is not. Creating the necessary job tickets, component IDs, and product labels for manufacturing is a growing source of waste and error. This white paper will explain how manufacturers can realize tangible improvements with proper printers and media.