This white paper discusses the conditions that have created the need for pattern matching techniques, the identification and creation of patterns, the Calibre Pattern Matching process, and the benefits derived from its use.
What Is CFA and Why Do I Need It? This five-part paper series examines the conditions that led to the development of recommended rules, and describes the process by which automated design analysis and rule verification can help designers optimize designs to the fullest and most efficient use of area, while still ensuring manufacturability.
Mocana's NanoSSL is a comprehensive SSL solution designed for efficiency and high performance in embedded and resource-constrained environments. Download the NanoSSL whitepaper and receive a free trial.
Mocana's NanoVOIP is a comprehensive security solution for application developers and device designers looking to build secure VOIP products. Its simple API means no previous crypto expertise is required, and its tiny memory footprint goes where other implementations simply can't. Download the NanoVOIP whitepaper and receive a free trial.
Learn how Mocana's NanoSec can speed your product development cycle while providing best-in-class device security for resource-constrained environments. Download the product whitepaper and receive a free trial.
Until recently, designing or building a wireless device meant cobbling together whatever security implementations you could find, often with open source and other code that is usually too big and too slow for device environments.
Today's technological innovation demands high performance coupled with low environmental impact. These dual requirements are driving components of the semiconductor industry which informs many global businesses and consumer lives.
"As the number of enhancements to various Hardware Description Languages (HDLs) has increased over the past year, so too has the complexity of determining which language is best for a particular design. Many designers and organizations are contemplating whether they should switch from one HDL to another.
This paper compares the technical characteristics of three, general-purpose HDLs.
The Business Ready Configurations for Dell PowerEdge blade servers, Dell EqualLogic SAN, and VMware Infrastructure provides a detailed reference architecture for deploying and using VMware virtualization on Dell blades and iSCSI storage environments. The Dell PowerEdge M1000e supports the recently announced 11th generation Dell PowerEdge M610 and M710 blade servers based on the new Intel Xeon processors.
A powerful signal integrity analysis tool must be flexibility, easy to use and integrated into an existing EDA framework and design flow. In addition, it is important for the tool to be accurate enough. This report reviews a validation study for the Mentor Graphics HyperLynx 8.0 PI tool to establish confidence in using it for power integrity analysis.
For advanced signaling over high-loss channels, designs today are using equalization and several new measurement methods to evaluate the performance of the link. Both simulation and measurement tools support equalization and the new measurement methods, but correlation of results throughout the design flow is unclear. In this paper a high performance equalizing serial data link is measured and the performance is compared to that predicted by simulation. Then, the differences between simulation and measurements are discussed as well as methods to correlate the two.
High Density Interconnect (HDI) is being used more often to meet the growing need for more complex designs in smaller form factors. Beyond some of the more obvious electrical effects of using smaller vias, there is also an impact to the power integrity of a board using HDI. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses. This paper will examine and quantify these effects, using numerous design examples, including a large conventional through-hole design board that was reduced using HDI.
The success of any consumer electronic device depends to a large extent on the appeal of the user interface (UI) and how easy the device is to use. Studies show that good cosmetic design can encourage users to explore the full range of features and often engenders the perception that a product is easier to use. So if the benefits of a great looking, easy-to-use UI are so clear, why are so many products still falling short of customer expectations? The solution lies in taking a fresh new approach a consumer electronic device UI plays. By identifying common UI functionality and implementing it in a reusable and customizable way, we can make it far easier for embedded engineers to deliver visually engaging and easy-to-use consumer electronic products.
Moving to C++ presents opportunities for higher programmer productivity. The requirements of embedded systems, however, demand that the adoption of C++ be carefully measured for the performance impact of run-time costs present in C++, but not in C. This talk suggests strategies for developers who are starting their acquaintance with C++.
When considering a new ASIC design, carefully consider the role Analog will play in its deployment. To minimize risk, choose your ASIC development partner carefully. Most of the time, Mixed-signal ASIC design skills will be s