White Paper Published By: Gigamon
Published Date: Oct 14, 2013
With an estimated 1.8 million branch offices in the US, not only is critical data being dispersed across the enterprise, but also applications. Organizations have invested in monitoring tools to help assure network and application performance, but do these tools have the visibility across the network to deliver real-time insights?
A Gigamon Visibility Fabric™ solution can extend visibility wherever critical data may exist. It eliminates the need to facilitate resources for troubleshooting and the need to install monitoring tools at every remote site. By doing so, it simplifies IT operations and centralizes monitoring tools that can reduce OPEX and CAPEX.
White Paper Published By: Gigamon
Published Date: Oct 11, 2013
Simplifying IT operations by centralizing monitoring tools and connecting them into a Gigamon Visibility Fabric™ can reduce OPEX and CAPEX. These monitoring tools include systems used for application performance management (APM), customer experience management (CEM), data loss prevention (DLP), deep packet inspection (DPI), intrusion detection systems (IDS), intrusion prevention systems (IPS), network performance management (NPM), network analysis, and packet capture devices. This white paper explains how this new approach to monitoring and management of IT infrastructure provides pervasive visibility across campus, branch, virtualized and, ultimately, SDN islands.
"As the number of enhancements to various Hardware Description Languages (HDLs) has increased over the past year, so too has the complexity of determining which language is best for a particular design. Many designers and organizations are contemplating whether they should switch from one HDL to another.
This paper compares the technical characteristics of three, general-purpose HDLs.
A powerful signal integrity analysis tool must be flexibility, easy to use and integrated into an existing EDA framework and design flow. In addition, it is important for the tool to be accurate enough. This report reviews a validation study for the Mentor Graphics HyperLynx 8.0 PI tool to establish confidence in using it for power integrity analysis.
For advanced signaling over high-loss channels, designs today are using equalization and several new measurement methods to evaluate the performance of the link. Both simulation and measurement tools support equalization and the new measurement methods, but correlation of results throughout the design flow is unclear. In this paper a high performance equalizing serial data link is measured and the performance is compared to that predicted by simulation. Then, the differences between simulation and measurements are discussed as well as methods to correlate the two.
High Density Interconnect (HDI) is being used more often to meet the growing need for more complex designs in smaller form factors. Beyond some of the more obvious electrical effects of using smaller vias, there is also an impact to the power integrity of a board using HDI. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses. This paper will examine and quantify these effects, using numerous design examples, including a large conventional through-hole design board that was reduced using HDI.
The success of any consumer electronic device depends to a large extent on the appeal of the user interface (UI) and how easy the device is to use. Studies show that good cosmetic design can encourage users to explore the full range of features and often engenders the perception that a product is easier to use. So if the benefits of a great looking, easy-to-use UI are so clear, why are so many products still falling short of customer expectations? The solution lies in taking a fresh new approach a consumer electronic device UI plays. By identifying common UI functionality and implementing it in a reusable and customizable way, we can make it far easier for embedded engineers to deliver visually engaging and easy-to-use consumer electronic products.
Moving to C++ presents opportunities for higher programmer productivity. The requirements of embedded systems, however, demand that the adoption of C++ be carefully measured for the performance impact of run-time costs present in C++, but not in C. This talk suggests strategies for developers who are starting their acquaintance with C++.
White Paper Published By: IBM
Published Date: Mar 24, 2009
Electronics and Software Engineering are quickly merging with traditional Mechanical Engineering to create a new paradigm in auto manufacturing: Mechatronics. Industry experts predict that this shift will bring about profound advances in automotive product development. Unfortunately, existing IT and process infrastructures do not provide sufficient capabilities to support the new paradigm: multiple data silos, a lack of standardized processes, and integration issues on a tool level (Mechanical, Electronic, Software) continue to pose serious obstacles to development efficiency, and remain a frequent source of delays, quality issues and cost increases.